1. Field of the Invention
The present invention pertains to regulators for digital-to-analog converters and related converters.
2. Description of the Related Art
Digital-to-analog converters are generally known and are used in various fields, such as for example for programming memory cells and in particular for programming Flash-type memories.
In this case the converters must have the requirements of high linearity and independence from temperature and feed voltage. In the case of Flash-type multi-level memories produced with CMOS technology, it is necessary to apply a fixed voltage to the drain of the cells while the gate terminal must be polarized with a controlled ramp voltage that varies by steps. To obtain very narrow distributions it is necessary that the steps of the ramp are well controlled and a check is made after each step in order to know whether the cell has reached the desired threshold voltage. Furthermore the magnitudes that vary less with temperature and the feed voltage in an integrated circuit are the reference voltage and the ratios of the resistances. For the reasons explained above, an R-2R type digital-to-analog converter is often used, making it possible to obtain much better controlled voltage steps and to produce in output a voltage proportional to the decimal value of the digital signal in input.
The regulator of an R-2R type digital-to-analog converter is shown in FIG. 1. In the regulator the output voltage is proportional to a ratio of resistances for the internal reference voltage of the device, which is the bandgap voltage VBGAP; in this way the voltage steps are independent from the temperature and the feed voltage. The regulator in FIG. 1 has seven buffers 1 having in input a digital data item BUS<i>with i=0 . . . 6, that is zero or one, being part of a digital word in input to the regulator. The buffers 1 are fed by the bandgap voltage VBGAP and the outputs are connected to each other by resistive branches 11-17 having resistances R of equal value in order to obtain an output
  OUT  =            ∑              i        =                  0          ⁢                                          ⁢          …          ⁢                                          ⁢          6                      ⁢                  (                                            2              i                        *            BUS                    <          i          >                      *                          V              BGAP                                      )            /      128      where VBGAP is normally the reference voltage of a Flash memory; therefore the converter provides a voltage externally proportional to the decimal value of the digital bus in input. The output OUT is amplified, obtaining the output Vp of the converter, and sent as input to the gate terminal of CMOS type memory cells. The circuit branch 11 is connected through two resistances in series of value R to the earth GND.
The various steps needed to program the cells are obtained by increasing the digital word BUS<6:0> entering the regulator by one digital datum; after each increase a check is made to exclude the cells that have reached the desired voltage threshold Vtprog, for example set to 4 Volt, and the process continues until all the cells are programmed to the desired value. With each increase of the digital word there is in first approximation the variation of the Flash cell's threshold equal to the value of the step itself Vstep, set for example to 0.07V. For this reason it is important that all the steps generated by the regulator are uniform in any operating condition so that the Flash cell is programmed in a uniform controlled way. The voltage steps in output from the converter, which comprises the regulator in FIG. 1, that differ from the value Vstep by an amount greater than a predetermined value ΔOff (for example equal to ±15 mV) make the programming of the cells non-uniform and contribute to broadening the programmed distributions, with consequent degradation of the multi-level Flash memory's reliability.
Said converter is subject to problems when there are changes in the most significant bits of the BUS in input since small differences between the resistances of the most significant branches are sufficient to obtain anomalous steps in the output. For example, a variation of 0.5% in one of the resistances of branch 17 is sufficient to produce a variation of 16% compared to the value expected for the OUT signal when there is an increment in the BUS<6> from the value 0 to the value 1.
FIG. 2 is a graph of the magnitude of the voltage steps Vp in output from the converter of the regulator in FIG. 1 which must be sent to the memory cells of a multi-level Flash NOR device. From the graph it can be seen that there are anomalous steps corresponding to the changes in BUS<6> and BUS<5> and BUS<3>, so corresponding to said changes the voltage steps exceed the desired value Vstep by a quantity ΔOff, with ΔOff=15 mV. Therefore the anomalous voltage steps occur in the case of the most significant bits since a variation in a resistance in one branch has repercussions on successive branches and not the preceding ones.